Automotive chip的問題，透過圖書和論文來找解法和答案更準確安心。 我們找到下列包括價格和評價等資訊懶人包

Adaptive Digital Circuits for Power-Performance Range Beyond Wide Voltage Scaling: From the Clock Path to the Data Path

為了解決Automotive chip的問題，作者Jain, Saurabh,Lin, Longyang,Alioto, Massimo 這樣論述：

This book offers the first comprehensive coverage of digital design techniques that expand the power-performance tradeoff well beyond allowed by conventional wide voltage scaling. Expanded power-performance range is indeed well-known to be required for next-generation always-on integrated systems wi

th lower power in the common case (e.g., minimum-energy point), and higher peak performance when occasionally needed (e.g., beyond the performance at nominal supply voltage). Such demand is typical of several prominent applications such as IoT, wearables, biomedical, automotive, computer vision, on-

chip AI and machine learning, among the many others. Reconfiguration in the data and the clock path is introduced to dynamically manage the design tradeoffs that traditionally limit the gains of voltage scaling, both on the lower and the upper end of the power-performance range. Reconfiguration inde

ed circumvents the traditional designer's dilemma of choosing which end of the power-performance spectrum is favored over the other, when adopting wide voltage scaling. Drop-in solutions for fully automated and low-effort design based on commercial design tools are extensively discussed for processo

rs, accelerators and on-chip memories. As further opportunity to reduce the design effort, higher power-performance versatility also enables extensive reuse of the same digital design instance across a wide range of applications. All concepts are exemplified by dedicated testchip designs and experim

ental results. To make the results immediately usable by the reader, all the scripts necessary to create automated design flows based on commercial tools are provided and explained. The book can be used as a reference to practicing engineers and researchers working in this area, as well as undergrad

uate and graduate students. The book is well suited for readers who are already familiar with basic electronics, and want to gain deeper knowledge in this field for product development or further research in the field. Saurabh Jain received the bachelor’s and master’s degrees from Indian Institute

of Technology, Kanpur, India, in 2012 and 2013 respectively, the Ph.D. degree from National University of Singapore, Singapore, in 2018. After his Ph.D. he worked as a postdoctoral research fellow at the Department of Electrical and Computer Engineering of the National University of Singapore. Curr

ently he is working as a research scientist at the processor architecture research lab (PARL) at Intel Labs, Bangalore.His research interest includes development of reconfigurable architectures for widely voltage-scalable memory and logic and general purpose compute-in-memory.Longyang Lin received t

he dual bachelor’s degrees from Shenzhen University, Shenzhen, China and Umeå University, Umeå, Sweden, in 2011 and the master’s degree from Lund University, Lund, Sweden, in 2013, and the Ph.D. degree from the National University of Singapore, Singapore, in 2018. He is currently a postdoctoral rese

arch fellow at the Department of Electrical and Computer Engineering of the National University of Singapore.His research interests include ultra-low power VLSI circuits, self-powered sensor nodes, widely energy-scalable VLSI circuits and general purpose compute-in-memory.Massimo Alioto received the

Laurea (MSc) degree in Electronics Engineering and the Ph.D. degree in Electrical Engineering from the University of Catania (Italy) in 1997 and 2001, and the Bachelor of Music in Jazz Studies from the Conservatory of Music of Bologna in 2007. He is with the Department of Electrical and Computer En

gineering, National University of Singapore where he leads the Green IC group and is the Director of the Integrated Circuits and Embedded Systems area. Previously, he held positions at the University of Siena, Intel Labs - CRL (2013), University of Michigan Ann Arbor (2011-2012), BWRC - University o

f California, Berkeley (2009-2011), and EPFL (Switzerland, 2007).He has authored or co-authored more than 280 publications on journals and conference proceedings. He is co-author of four books, including Enabling the Internet of Things - from Circuits to Systems (Springer, 2017), Flip-Flop Design in

Nanometer CMOS - from High Speed to Low Energy (Springer, 2015), and Model and Design of Bipolar and MOS Current-Mode Logic: CML, ECL and SCL Digital Circuits (Springer, 2005). His primary research interests include self-powered wireless integrated systems, near-threshold circuits for green computi

ng, widely energy- scalable and energy-quality scalable integrated systems, data-driven integrated systems, hardware-level security, and emerging technologies, among the others. He is the Editor in Chief of the IEEE Transactions on VLSI Systems (2019-2020), and was the Deputy Editor in Chief of the

IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2018). In 2009-2010 he was Distinguished Lecturer of the IEEE Circuits and Systems Society, for which he is/was also member of the Board of Governors (2015-2020), and Chair of the ＂VLSI Systems and Applications＂ Technical Committe

e (2010-2012). In the last five years, he has given 50+ invited talks in top conferences, universities and leading semiconductor companies. His research has been mentioned in more than 60 press releases and popular science articles in the last two years. He served as Guest Editor of several IEEE jou

rnal special issues (e.g., TCAS-I, TCAS-II, JETCAS). He also serves or has served as Associate Editor of a number of IEEE and ACM journals. He is/was Technical Program Chair (ISCAS 2023, SOCC, ICECS, NEWCAS, VARI, ICM, PRIME) and Track Chair in a number of conferences (ICCD, ISCAS, ICECS, VLSI-SoC,

APCCAS, ICM). Currently, he is also in the IEEE ＂Digital Architectures and Systems＂ ISSCC subcommittee, and the IEEE ASSCC technical program committee. Prof. Alioto is an IEEE Fellow.

Security Policy in System-on-chip: Specification, Implementation and Verification

為了解決Automotive chip的問題，作者Ray, Sandip/ Basak, Abhishek/ Bhunia, Swarup 這樣論述：

This book offers readers comprehensive coverage of security policy specification using new policy languages, implementation of security policies in Systems-on-Chip (SoC) designs - current industrial practice, as well as emerging approaches to architecting SoC security policies and security policy ve

rification. The authors focus on a promising security architecture for implementing security policies, which satisfies the goals of flexibility, verification, and upgradability from the ground up, including a plug-and-play hardware block in which all policy implementations are enclosed. Using this a

rchitecture, they discuss the ramifications of designing SoC security policies, including effects on non-functional properties (power/performance), debug, validation, and upgrade. The authors also describe a systematic approach for "hardware patching", i.e., upgrading hardware implementations of sec

urity requirements safely, reliably, and securely in the field, meeting a critical need for diverse Internet of Things (IoT) devices.Provides comprehensive coverage of SoC security requirements, security policies, languages, and security architecture for current and emerging computing devices;Explod

es myths and ambiguities in SoC security policy implementations, and provide a rigorous treatment of the subject;Demonstrates a rigorous, step-by-step approach to developing a diversity of SoC security policies;Introduces a rigorous, disciplined approach to "hardware patching", i.e., secure techniqu

e for updating hardware functionality of computing devices in-field;Includes discussion of current and emerging approaches for security policy verification. Sandip Ray is an Endowed IoT Term Professor at the Department of Electrical and Computer Engineering, University of Florida. His research inv

olves developing correct, dependable, secure, and trustworthy computing through cooperation of specification, synthesis, architecture and validation technologies. His research targets next-generation computing applications, including autonomous automotive systems, smart homes, intelligent implants,

etc. Before joining University of Florida, Dr. Ray was a Senior Principal Engineer at NXP Semiconductors, where he led the R&D on security validation for automotive and Internet- of-Things applications. Prior to that, he was a Research Scientist at Intel Strategic CAD Labs, where he worked on pre-si

licon and post-silicon validation of security and functional correctness of SoC designs, design-for-security and design-for-debug architectures, CAD tools, and specifications for SoC design requirements. Prior to joining industry, Dr. Ray was a Research Scientist at University of Texas at Austin, wh

ere he led several sponsored projects from DARPA, SRC, and National Science Foundation. Dr. Ray is the author of three books (one upcoming) and over 60 publications in peer-reviewed premier international journals and conferences. He served as guest editors for an IEEE Transactions on Multi-Scale Sys

tems (TMSCS) special issue on Wearables, Implants, and Internet-of-Things, as well as special issues of ACM Transactions on Design Automation of Electronic Systems (TODAES) and Springer Journal on Electronic Testing Theory and Applications (JETTA). He has given number of invited, tutorial, and keyno

te presentations at several international forums on security, validation, and energy challenges in the IoT regime. During his tenure in industry, Dr. Ray served as Intel and NXP representative in Semiconductor Research Consortium (SRC) technical advisory board, and as semiconductor industry represen

tative on trustworthy systems to the Semiconductor Industry Association (SIA). He has served as a program committee member for more than 50 international meetings and conferences, and as program chair for Formal Methods in Computer-Aided Design (FMCAD). He currently serves as an Associate Editor for

IEEE TMSCS and Springer Journal on Hardware and Systems Security. He has a Ph.D. from University of Texas at Austin and is a Senior Member of IEEE. Abhishek Basak is a research scientist in Security and Privacy Research, Intel Labs. He completed his PhD in Computer Engineering from Case Western Res

erve University in 2016. Before that, he got his Bachelors in Electrical Engineering from Jadavpur University, India in 2010. Dr. Basak’s research interests lie in the fields of hardware assists for security of S/W layer stacks, trustworthy compute platforms, reconfigurable hardware architectures an

d energy efficient, reliable hardware design methodologies. He has more than 15 research publications, including conferences like DAC, ICCAD, VTS, ITC as well as journals like IEEE TCAD, TIFS, D&T. He currently holds 2 patents and is a member of IEEE.Swarup Bhunia received his B.E. (Hons.) from Jada

vpur University, Kolkata, India, and the M.Tech. degree from the Indian Institute of Technology (IIT), Kharagpur. He received his Ph.D. from Purdue University, IN, USA, in 2005. Currently, Dr. Bhunia is a Preeminence Professor and Steven Yatauro Faculty Fellow in the department of Electrical and Com

puter Engineering at University of Florida, Gainesville, FL, USA. Earlier, Dr. Bhunia has served as the T. and A. Schroeder Associate Professor of Electrical Engineering and Computer Science at Case Western Reserve University, Cleveland, OH, USA. He has over 250 publications in peer-reviewed journal

s and premier conferences and four books (three edited) in the area of VLSI design, CAD and test techniques. His research interests include low power and robust design, hardware security and trust, adaptive nanocomputing and novel test methodologies. He has worked in the semiconductor industry on RT

L synthesis, verification, and low power design for about three years. Dr. Bhunia received IBM Faculty Award (2013), National Science Foundation (NSF) career development award (2011), Semiconductor Research Corporation (SRC) technical excellence award (2005) as a team member, best paper award in IEE

E BioMedical Circuits and Systems Conference (BioCAS 2016), best paper award in International Conference on VLSI Design (VLSI Design 2012), best paper award in International Conference on Computer Design (ICCD 2004), best paper award in Latin American Test Workshop (LATW 2003), and best paper nomina

tion in Asia and South Pacific Design Automation Conference (ASP-DAC 2006) and in Hardware Oriented Test and Security (HOST 2010), nomination for John S. Diekhoff Award, Case Western Reserve University (2010) and SRC Inventor Recognition Award (2009). Dr. Bhunia has been serving as founding editor-i

n-chief in Journal of Hardware and Systems Security (HaSS), an associate editor of IEEE Transactions on CAD (TCAD), IEEE Transactions on Multi-Scale Computing Systems (TMSCS), ACM Journal of Emerging Technologies (JETC), and Journal of Low Power Electronics (JOLPE). He has served as a guest editor o

f IEEE Design & Test of Computers (2010, 2013), IEEE Computer Magazine (2016), IEEE Transcation on CAD (2015), and IEEE Journal on Emerging and Selected Topics in Circuits and Systems (2014). He has served as co-program chair of IEEE IMS3TW 2011, IEEE NANOARCH 2013, IEEE VDAT 2014, and IEEE HOST 201

5, and in the technical program committee of many top-tier international conferences on design automation and security. He is a senior member of IEEE.

應用於移動式 UHF 射頻充電的高效率且寬輸入範圍之電源管理晶片採用自適應負載/輸入功率匹配技術

為了解決Automotive chip的問題，作者郭浩毅 這樣論述：

近年來由於物聯網的興起，使得環境中佈建的無線感測器之需求快速上升。傳統的無線感測器之能量來源主要藉由化學電池提供，因此要具有較長的生命週期與較小的體積是相當困難的。無線能量擷取技術為透過環境中的能量來驅動電子電路的相關技術，提供無線感測節點所需的能量並且延長電池壽命。RF功率擷取方法是目前最常使用於短距離(數十公尺內)能量傳遞的方法之一，但由於目前的RF能量管理電路的高效率受限於窄小的輸入功率範圍，因此相關的應用依舊十分受限。本論文以應用於物聯網之無線能量擷取系統為出發點，除了使用可重構式技術來改善傳統交直流轉換架構之窄小輸入範圍的能量轉換曲線達成具有大動態輸入範圍之交直流轉換電路外，更藉由

後端包含負載調變電路的MPPT技術與低壓降穩壓器穩定輸出電壓值來提高高輸入功率時整體系統之效率。整體系統以CMOS 0.18μm製程製作，為一個全整合式之積體電路，其寬輸入動態範圍之交直流轉換電路具有54.2%之最佳轉換效率、-19.6dBm之靈敏度與20dB大輸入範圍且高轉換效率(Efficiency > 20%)。高轉換效率的能量擷取與高整合晶片將可以有效地解決過去RF能量擷取的效率不佳及能量浪費等問題，並且可以應用於更多功率以及體積限制的植入式生物感測器系統、智慧感測系統、自動電子收費系統貼片及無線充電等需要無線能量傳輸及穩定輸出電壓值的電路中。